Technical Report (TR01-01) Cover Page
Department of Computer Science,
Graduate school of Information Science and Technology,
University of Tokyo
- Title:
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A Study on Memory-Based Communications and Synchronization in Distributed-Memory Systems
- Authors:
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Takashi MATSUMOTO
- Key words and phrases:
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memory-based communication, distributed shared memory,light-weight communication,
memory-based processor, MBCF, parallel processing, PC cluster, workstation cluster
- Abstract:
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In terms of facilities for communications and synchronization
in parallel programs, the descriptive power of the shared-memory model
is equal to that of the message-passing-style (send-and-receive-type)
model.
From the viewpoint of performance, however,the situation is different.
A very convenient way of improving performance or
increasing the variety of functions
is to have the communication/synchronization
subsystems handle information related to the memory locations
at which target data are stored.
In other words, communication/synchronization subsystems based on
the shared-memory model are superior to message-passing-style
subsystems which simply relay data from one task to another.
This conclusion holds
whether the subsystem is implemented in hardware or software.
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In this thesis, the Memory-Based
Communications and Synchronization (MBCS) scheme is proposed.
In this scheme, recognition and exploitation of information on the
locations of target data by
communication/synchronization subsystems is proposed, along with
brand-new mechanisms based on this scheme.
Three communication/synchronization mechanisms based on
the MBCS scheme are then proposed.
The first mechanism, called the
Memory-Based Processor (MBP), is a hardware-implemented
fine-grained communication/synchronization mechanism.
The MBP is also a building-block for hardware-based distributed shared
memory.
The second is the Memory-Based
Communication Facility (MBCF) which is
a software-implemented medium-grained communication/synchronization mechanism
made with off-the-shelf network hardware.
The third is the the Memory-Based Processor II (MBP2),
a hardware-implemented medium-grained mechanism
which was designed and developed on the basis of research results on the MBCF.
In this thesis, (1) brand-new functions to run on these
mechanisms are proposed, (2) explanations of their behaviors and of high-speed
implementation methods are given,
(3) comparisons are made with other existing mechanisms,
qualitative discussions are presented, and
(4) experimental verification is described.
Through these discussions,
the effectiveness of the MBCS scheme will be made clear.
- Report date:
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October 15, 2001
- Written language:
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English
- Total number of pages:
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131
- Number of references:
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82
- Any other identifying information of this report:
-
- Distribution statement:
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First issue 30 copies.
- Supplementary notes:
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